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Gareth McCaughan
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I also think this is unsolvable. My reasoning resembles Chris's:

  1. Top-right AND must have both inputs 1.
  2. Right-hand switch must be positioned right, and input to that switch must be 1.
  3. Output of AND gate below that switch must be 1, so both its inputs must be 1.
  4. Output of AND gate below that must be 1, so both its inputs must be 1.
  5. Right-hand input of XNOR gate near bottom left is 1, so left-hand input and output must be equal.
  6. The two inputs to the XOR at middle left are equal, so output is 0.
  7. Top-left XOR's left input is 0, so its right input must be 1.
  8. Output of middle-left NOR must be 1, so its inputs must both be 0.
  9. Now we have a contradiction, because 3 says left input of middle-right AND is 1 but 8 says right input of middle-left NOR is 0, but those two are tied together.

I've also brute-forced it by computer; of course my code may have bugs but probably not the same bugs as my reasoning above. This displays intermediate results as well as final output.

for n in range(1<<6):
    s = (n>>4)&1, (n>>5)&1
    r = n&1, (n>>1)&1, (n>>2)&1, (n>>3)&1 # just above bottom gates
    t = [r]
    r = r[0], 1-(r[0]^r[1]), r[1]&r[2], r[2]|r[3], r[3]
    t.append(r)
    r = r[0]^r[1], 1-(r[1]|r[2]), r[2]&r[3], r[3]|r[4]
    t.append(r)
    r = r[0], (1-s[0])&r[1], s[0]&r[1], (1-s[1])&r[2],s[1]&r[2], r[3]
    t.append(r)
    r = r[0]^r[1], 1-(r[2]&r[3]), r[4]&r[5]
    t.append(r)
    win = r[0]&r[1]&r[2]
    print("%.02d"%n,t,win)

Notice that no line of its output ends in a 1.

I also think this is unsolvable. My reasoning resembles Chris's:

  1. Top-right AND must have both inputs 1.
  2. Right-hand switch must be positioned right, and input to that switch must be 1.
  3. Output of AND gate below that switch must be 1, so both its inputs must be 1.
  4. Output of AND gate below that must be 1, so both its inputs must be 1.
  5. Right-hand input of XNOR gate near bottom left is 1, so left-hand input and output must be equal.
  6. The two inputs to the XOR at middle left are equal, so output is 0.
  7. Top-left XOR's left input is 0, so its right input must be 1.
  8. Output of middle-left NOR must be 1, so its inputs must both be 0.
  9. Now we have a contradiction, because 3 says left input of middle-right AND is 1 but 8 says right input of middle-left NOR is 0, but those two are tied together.

I also think this is unsolvable. My reasoning resembles Chris's:

  1. Top-right AND must have both inputs 1.
  2. Right-hand switch must be positioned right, and input to that switch must be 1.
  3. Output of AND gate below that switch must be 1, so both its inputs must be 1.
  4. Output of AND gate below that must be 1, so both its inputs must be 1.
  5. Right-hand input of XNOR gate near bottom left is 1, so left-hand input and output must be equal.
  6. The two inputs to the XOR at middle left are equal, so output is 0.
  7. Top-left XOR's left input is 0, so its right input must be 1.
  8. Output of middle-left NOR must be 1, so its inputs must both be 0.
  9. Now we have a contradiction, because 3 says left input of middle-right AND is 1 but 8 says right input of middle-left NOR is 0, but those two are tied together.

I've also brute-forced it by computer; of course my code may have bugs but probably not the same bugs as my reasoning above. This displays intermediate results as well as final output.

for n in range(1<<6):
    s = (n>>4)&1, (n>>5)&1
    r = n&1, (n>>1)&1, (n>>2)&1, (n>>3)&1 # just above bottom gates
    t = [r]
    r = r[0], 1-(r[0]^r[1]), r[1]&r[2], r[2]|r[3], r[3]
    t.append(r)
    r = r[0]^r[1], 1-(r[1]|r[2]), r[2]&r[3], r[3]|r[4]
    t.append(r)
    r = r[0], (1-s[0])&r[1], s[0]&r[1], (1-s[1])&r[2],s[1]&r[2], r[3]
    t.append(r)
    r = r[0]^r[1], 1-(r[2]&r[3]), r[4]&r[5]
    t.append(r)
    win = r[0]&r[1]&r[2]
    print("%.02d"%n,t,win)

Notice that no line of its output ends in a 1.

Source Link
Gareth McCaughan
  • 122.1k
  • 7
  • 320
  • 464

I also think this is unsolvable. My reasoning resembles Chris's:

  1. Top-right AND must have both inputs 1.
  2. Right-hand switch must be positioned right, and input to that switch must be 1.
  3. Output of AND gate below that switch must be 1, so both its inputs must be 1.
  4. Output of AND gate below that must be 1, so both its inputs must be 1.
  5. Right-hand input of XNOR gate near bottom left is 1, so left-hand input and output must be equal.
  6. The two inputs to the XOR at middle left are equal, so output is 0.
  7. Top-left XOR's left input is 0, so its right input must be 1.
  8. Output of middle-left NOR must be 1, so its inputs must both be 0.
  9. Now we have a contradiction, because 3 says left input of middle-right AND is 1 but 8 says right input of middle-left NOR is 0, but those two are tied together.